Rogers PCB laminates are among the most popular material sets used for RF PCB design. They can be used in hybrid PCB stack-ups or as a standalone laminate system that can achieve standard thicknesses. A range of material options is available, with different DK values and laminate thicknesses, giving designers a lot of freedom to tailor their design’s electrical properties to meet operational targets.
When selecting a PTFE PCB stack-up or Rogers PTFE material set, the thickness of individual layers is crucial. This plays an important role in RF transmission line design because it determines both the impedance and losses for signals on an interconnect. Additionally, there are design approaches that involve using thinner layers while still allowing the designer to tune the geometry of a transmission line to achieve impedance and loss targets.
Trace Width and Impedance Drive PTFE Layer Thickness
PTFE materials, most commonly Rogers PTFE materials, are available in very thick or relatively thin layers. The use of thicker or thinner layers allows designers to include a Rogers dielectric layer in their PCB stack-up and still meet standard thickness values. This means you could build a standard 62 mil thick PCB from a single dielectric layer of Rogers PTFE material. Other vendors, such as Arlon and AGC, provide many of the same options.
Microstrip on Two-Layer PTFE PCB
If you were to use a standard thickness sheet of PTFE as your PCB substrate, what would the trace width be for 50-ohm or 75-ohm impedance? Assuming the top layer is a trace and the bottom layer is a ground plane, the trace widths would come to:
- 50 ohms: 152 mils
- 75 ohms: 74 mils
These trace widths are fine for printed circuits, and the signals in these circuits would experience quite low conductor loss. This is desirable for printed RF circuits in general, particularly passive circuits, which do not have any power applied. If you look at PTFE PCBs with printed RF circuits, you will see that the trace widths tend to be quite large.
Printed RF splitter and filter example.
Most RF systems will not use printed circuits as the only circuitry in a design. Instead, components operating at high frequencies will be placed in standard packages, just like digital components, or they may interface with external modules via connectors (such as SMA connectors). They may also have interfaces on the board used to configure or control the RF components. This means we need to make transmission lines for RF signals thinner so they can route into standard component packages. The same idea applies for RF circuits interfacing with connectors; those connector pins have limited space to accept a trace and transmit a signal into a transmission line structure. There are two options here: use coplanar routing or use higher layer counts.
Coplanar Microstrip on a Two-Layer PTFE PCB
Coplanar microstrips use a coplanar ground pour on the surface layer to narrow the width of an RF transmission line. The coplanar ground has some parasitic capacitance with respect to the RF transmission line. This parasitic capacitance reduces the impedance, so the designer compensates by making the trace narrower, bringing the trace impedance to its typical target of 50 ohms.
Coplanar ground pour has negligible mutual (parasitic) inductance but high mutual capacitance to a nearby trace.
On a two-layer PTFE PCB, coplanar ground can be used, often with a via fence, to form a grounded coplanar waveguide. The designer needs to set a narrow clearance limit between the trace edge and the copper pour edge. This clearance, as well as the placement of ground vias, will set the transmission line impedance to a desired value.
For example, the trace width of a coplanar microstrip on a two-layer, 62 mil thick sheet of RO3003 with 5 mil clearance would be 44 mils for a 50-ohm impedance. This is still not an ideal solution for routing into standard component packages; tapering will be needed to route in and out of component pins.
Coplanar ground on 2 layers allows smaller microstrips, but it still requires tapering into component packages due to small pin sizes. Image source: Hemeixin PCB.
Digital Routing and Impedance Concerns
Digital routing can also be used in these designs, but it is typically not done. This is because digital lines also require coplanar ground to have reasonable impedance in small trace widths. On thick PTFE, the clearances can get quite small in order to have traces 8 to 12 mils wide for digital signals. As we discussed in another article on two-layer PCBs, it is possible to do this without EMI problems when signals do not have strict impedance requirements or are somewhat slower in terms of edge rate. Typically, with digital signals on a PTFE PCB, we would prefer a four-layer PCB or a hybrid PCB design with higher layer counts.
Four-Layer PTFE PCBs
When PTFE PCB materials are used to build a four-layer PCB, we generally assign the two internal layers to ground planes. Using PTFE laminates in this stack-up gives significant freedom to select microstrip trace widths due to the large number of thickness options available from PTFE laminate vendors. For example, you could use a stack-up that has thicker outer dielectrics and a thinner bond ply as the core layer.
Four-layer PTFE PCBs allow the use of thinner microstrip traces and smaller printed circuits. Image source: Weller PCB.
The stack-up shown above, where thick outer layers are used, is not typically used when digital routing is needed in these PCBs. When digital routing is present, we might instead opt to use a thinner layer of PTFE as the outer dielectric without coplanar ground. This is a typical approach in RF systems with digital interfaces and components.
To see how this works, take a look at our power amplifier example project shown below. In this example, a typical four-layer PCB stack-up structure is used with PTFE materials. Coplanar routing with a via fence forms a grounded coplanar waveguide on the main RF line. This design could also allow digital routing thanks to the thinner outer layers.
Coplanar waveguide routing in our example 6 GHz signal generator and amplifier project.
Controlling Impedance and Parasitics on RF Lines
How do we further control the impedance and parasitics on components along this RF line? One strategy in a four-layer PTFE PCB is to place cutouts on layers 2 and 3 only below the RF line. This forms a larger coplanar waveguide in the design.
While this larger coplanar waveguide may have smaller TEM bandwidth, the ground cutout will reduce parasitics on components along any matching networks and along the bias tee, which powers the RF amplifier in the example project above. When you go to much higher frequencies, generally above Wi-Fi frequencies, this issue with parasitics on component pads is usually eliminated because any required circuitry or matching networks will be present in your RFICs.
A cutout region was placed below this impedance matching network and coplanar waveguide in order to reduce parasitic capacitance and parasitic inductance to the pads on these components. For more information, see our example nRF52 project.
Whether you're designing high-speed PCBs for mil-aero embedded systems or a complex RF product, you should work with a design and development firm that can ensure your product will be reliable and manufacturable at scale. NWES helps aerospace OEMs, defense primes, and private companies in multiple industries design modern PCBs and create cutting-edge embedded technology, including power systems for high reliability applications and precision control systems. We've also partnered directly with EDA companies and advanced ITAR-compliant PCB manufacturers, and we'll make sure your design is fully manufacturable at scale. Contact NWES for a consultation.
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