nRF52 Module With Battery Power

PN: NRFMOD-001, Last updated: September 2025 (Rev B)
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This Bluetooth module is based on the nRF52 WLCSP fine-pitch BGA package. Includes an EEPROM, programming header, I/O header, batter connector, and power/battery management. USB charging is not included at this time.

Major components include:




nRF52 Battery‑Powered Module

This compact module integrates a Nordic nRF52840 SoC in a wafer‑level chip scale package (WLCSP) with power management, EEPROM and a real‑time clock. The board is designed to operate from a battery and provides a pin header for programming and I/O. It is ideal for low‑power wireless applications such as wearable devices or sensor nodes.

Functional Overview

This section outlines the primary components and features of the module. Understanding how the SoC, regulators and peripherals interact will help you integrate the board into your system.

  • Bluetooth SoC – The nRF52840 WLCSP supports Bluetooth 5 and offers a wide range of peripherals. Its tiny pitch (0.35 mm) requires high‑density interconnect (HDI) techniques such as via‑in‑pad and blind/buried vias for breakout.
  • Power management – A TPS70933 LDO provides a stable 3.3 V rail. A reverse‑polarity protection diode (FR015L3EZ) guards against incorrect battery connection, and a BD33HC0MEFJ regulator powers external peripherals.
  • Peripherals – The board includes a PCF8523 real‑time clock and a 512 kB CAT24C512 EEPROM for additional non‑volatile storage.

Using The Module

Use the following steps to power, program and interface with the module safely and efficiently.

  • Powering the board – Connect a Li‑ion battery to the VBAT header. The reverse‑polarity diode protects the circuit. The TPS70933 LDO regulates the battery voltage to 3.3 V for the nRF52840 and peripherals.
  • Programming and I/O – Use the SWD or JTAG pins exposed on the header to program the SoC. Additional GPIO pins are available for sensors or actuators. The board does not include USB charging circuitry, so charge the battery externally.
  • Power domains – The design uses separate VDD nets for the MCU core (VDD1) and peripherals (VDD2). This allows the core to be powered down while peripherals remain active. Choose regulators with low quiescent current to extend battery life.
  • Antenna and RF – The nRF52840’s integrated antenna requires a matching network and a keep‑out area on the PCB. Follow the reference design to place the antenna near the board edge and keep metal objects away to prevent detuning.

Design Considerations

Compact wireless designs require HDI techniques and careful power management. The following points emphasize layout and low‑power considerations.

  • HDI layout – The 0.35 mm WLCSP necessitates using microvias and via‑in‑pad technology. Use a 4‑layer stack‑up with ground planes on the inner layers to provide good return paths and minimize emissions.
  • Low‑power operation – Select low‑quiescent‑current regulators and use the nRF52840’s sleep modes. Separate VDD domains allow unused peripherals to be powered down to conserve battery life.
  • External components – Place decoupling capacitors close to every power pin. Keep I2C lines for the RTC and EEPROM short and include pull‑up resistors. Provide test points for debugging and battery voltage measurement.
ComponentFunction
nRF52840‑CKAA‑R7Bluetooth 5 SoC
TPS70933Low‑current LDO for 3.3 V rail
FR015L3EZReverse‑polarity protection diode
PCF8523 RTCReal‑time clock
CAT24C512512 kB EEPROM

Engineers can customize the firmware and peripheral connections to build compact sensors, trackers or wearables.

To optimize RF performance, keep the antenna area free of ground planes and route other traces away from it. Matching network components should be tuned while starting from the values in the reference design. The nRF52840 supports multiple protocols such as Bluetooth Low Energy, Thread and Zigbee; by selecting different firmware stacks, the module can adapt to various wireless networks. Use the EEPROM to store configuration data or sensor readings, and synchronize the real‑time clock with a network time source for accurate time stamping in data‑logging applications.

Additional Resources

Read the full guide article on Altium Resources for a deep dive on this project. The video below shows the design approach and preparation for manufacturing of the Rev A release of this project, starting from schematic review and completing the PCB layout.



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