5G has barely rolled out in the US, and researchers in Europe are already looking 6G. The pace of evolution is truly breathtaking. The telecom industry figured out long ago that you can avoid many signal integrity problems by switching to fiber; now we have data rates in the 10’s to 100’s of Gbps in multiple lanes, and ICs are still catching up to these capabilities. RF designers working at 40 GHz and above will have to contend with signal rise times (~20 ps, or an equivalent knee frequency of 50 GHz) only seen in data center and optical networking environments. Here at NWES, we want to give innovators the information they need to prepare their new products for the future, and this means ensuring PCB designers and our prospective clients have a solid understanding of RF PCB layout techniques.

Your RF PCB Layout

RF PCBs are a different beast than a typical digital PCB. The signal integrity problems that can arise above WiFi frequencies (i.e., 10’s GHz and higher) occur due to fundamental physical mechanisms in the substrate material. Most RF designers have worked up to the 5 GHz range in the past, but this is set to change going forward, and new products will push analog devices to their limits.

Personally, I come from an optics background, so I’ve always been more of an analog guy rather than a digital designer. Many PCBs will eventually start to look a lot more like optical devices in that we will inevitably move to electronic-photonic integrated circuits (EPICs) and PCBs, and ultimately fully photonic PCBs. In the meantime, more designers will need to become comfortable with faster data rates, which are accompanied by faster rise times and higher frequencies.

In this post, I want to focus on two important areas of RF PCB design and layout: routing and signal integrity. Obviously, the two are related, but there are many more areas to explore. I’ll be producing a series of posts on these and other topics in the coming weeks. For now, let’s focus on trace geometry and losses on mmWave interconnects as these two aspects of your RF PCB layout will be major determinants of signal integrity.

Transmission lines should be routed as controlled impedance lines with appropriately sized width to ensure the requried bandwidth is provided in these interconnects. These interconnects can experience excessive insertion loss due to destructive interference of the electric field of the line is too wide, and only signals below some limit will be allowed to propagate with low loss. Bringing the impedance to the right value with a narrower line requires placing the ground plane closer to the transmission line, which has the side benefit of reducing parasitic coupling between the signal on the waveguide and nearby signals.

Interconnect Losses

In order to reduce losses, ensure isolation, and properly size your conductors, you’ll need to choose an appropriate trace geometry for use in your RF PCB layout. I would argue for using GCPW routing on the surface layer of your PCB and symmetric stripline routing in an interior layer. However, you should preferentially route on the surface layer as GCPWs will provide high isolation (typically -45 dB), lower losses, and lower dispersion than a microstrip or stripline trace with the same impedance.

If you look at data on insertion loss in different trace configurations on FR4 (see Fig. 2), you’ll find that microstrips traces losses tend to increase at a faster rate than losses in GPCWs at frequencies beyond ~25 GHz. Even if you use guard vias on these microstrips, you’ll find that losses in microstrips become higher than losses in GPCWs beyond ~40 GHz. This makes GPCWs ideal for routing at mmWave and higher frequency bands.

 

 

In addition to dielectric absorption in the substrate, the progressively higher losses in microstrip and stripline traces is due to copper roughness combined with the skin effect. At progressively higher frequencies, more current becomes confined near the edge of a conductor. Rough etching on copper surfaces creates surface roughness, which is a well-known source of DC losses. The roughness between the deposited copper foil and the substrate in microstrips and striplines tends to have the highest roughness, thus it will incur the highest resistive losses.

This should illustrate the advantage of GCPWs: the skin effect still occurs, but the ground planes surrounding GCPWs draws the currents to the horizontal boundaries of the waveguide (which borders air), where the surface roughness is very low. No matter which routing geometry you use, you should also use a substrate with low loss tangent at the relevant frequency. GCPWs are a better choice for FR4, while microstrip and stripline will operate better on Rogers or Isola laminates at mmWave frequencies.

A recent simulation study provides and excellent comparison of insertion and return loss spectra for grounded and ungrounded coplanar waveguide interconnects on thin polyerm substrates. Their results show excellent insertion less (less than 15 dB) up to ~80 GHz, making these interconnects an excellent choice for innovative designs on unique substrates.

 

RF PCB layout for mmWave frequency devices takes the right design tools and analysis experience. If you’re looking for a knowledgable firm that offers cutting-edge PCB design services and technology research services for innovative electronics companies, contact NWES for a consultation.

 

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