ferrite bead pcb pdn

Ferrite Beads in a PCB PDN With Heidi Barnes: OnTrack Bites


Over and over again, we still see application notes and reference designs that Advocate the use of a ferrite bead in a PDN to support a high-speed digital component with fast I/Os. These components are often used in two possible instances:

  1. As an isolating element between two rails powered by the same voltage regulator module
  2. As a noise reduction element (filter) with the goal of reducing noise from transients on the PDN

The appropriateness of the first instance is debatable, as it depends on the power spectrum required at the output of each of the isolated rails, the resonant frequency of the ferrite bead, and its resistance at resonance, all of which demand simulation and testing to fully qualify. In the other case, where the ferrite is placed in series with the power regulator output pin or the VDD supply pin on a digital integrated circuit, it is almost always bad and creates more noise when I/Os demand current at fast edge rates.

I discussed these points with Heidi Barnes of Keysight, an expert in signal integrity and power integrity. Heidi's take aligns with what is described above: the addition of a ferrite in a PDN for a digital processor generally creates more problems than it will solve.

Watch the clip below with Heidi Barnes or watch the full Altium OnTrack podcast episode here.

The Takeaway

Ferrites are poorly characterized inductors, and they become resistive at mid-range frequencies near their resonant frequency. The additional inductance and resistance increase the impedance of the PDN, which in turn increases the voltage transient when digital I/Os demand current at fast edge rates. This then requires placing additional capacitance to compensate for the additional resistance and inductance of the ferrite.

This should illustrate why it is so important to use capacitance as the main tool for ensuring low PDN impedance. This capacitance is supplied by bulk capacitors, small case capacitors with low ESR, plane capacitance, and an embedded capacitance material in power-ground plane pairs in extreme cases. With this approach, it’s possible to achieve low voltage ripple on the PDN supporting fast digital I/Os up to many hundreds of amps.


Zach: Another thing about critical damping is that a lot of designers are trying to achieve this with transient response without actually realizing it. This is often done by possibly adding a ferrite into a rail on a PDN. I love the reaction because that's usually my reaction too. I've seen the ferrite used in two possible ways. One is just as a damping element on a rail that is supporting high-speed IOs. The other way is to isolate a high-speed rail from maybe a lower-speed rail, like the PLL Rail, to prevent the noise from the high-speed rail from propagating over to a different rail. As an isolating element, tell me your thoughts on that. Maybe I can tell you mine, but I'd like to hear yours.

Heidi: Buyer beware, right? My really simple IC viewpoint is that there was a time when your VRM and your load were within the bandwidth of the control loop of the VRM. So, your power supply was slow, and your load was slow. When I put a ferrite bead in there with this increasing resistance at higher frequencies, this inductance, that was okay because my load wasn't running fast, and I was trying to maybe get rid of some noise. But now, my high-speed digital load is a high-frequency load; it needs power at those higher frequencies. The moment I put an inductor in there, this bead, this ferrite bead, it does have resistance at the higher frequencies, but it also will turn into a capacitor eventually. It's not a perfect inductor. It will then resonate and ring with other things in your circuit.

On top of that, I'm trying to deliver high-frequency power to this load, and you just added more inductance. You've made my life harder. I've got to add more capacitors to compensate for the inductance you just put in there. You really have to ask yourself, are you saving money, or should you go back and consider other options? Steve Sandler did an excellent video on YouTube, sponsored by Keysight, on how to design for power integrity. One of the first videos, actually the second one, was on how to characterize a voltage regulator module, a VRM, or regulator DC converter. He mentioned picking a current mode VRM because the power supply rejection ratio is so much better, and its output impedance stability is much better. There are just some simple things you can do with the selection of the VRM.

In an engineering environment like ADS, it's very easy to do some Monte Carlo sweeps of tolerances, set up those SPICE-type transient simulations, and look at different regulator topologies. You can even use Steve Sandler's state space average model that simulates very quickly with harmonic balance in a matter of minutes instead of hours with transient simulations. The main point is that you really want to understand how the power delivery is happening. If you design it correctly, you're matching impedance and getting rid of those resonances. You have a regulator with a high power supply rejection ratio, and you shouldn't need to add the expense of a bead and then have to add even more capacitors to compensate for that extra inductance for your high-speed digital loads.

That also leads into the EMI/EMC issue. Let me start with a simpler example. When we talk about noise and energy going to the wrong places, in the signal integrity world, I like the example of a transmitter to a receiver. If I have a matched transmission line, I don't have any reflections. All the power goes from the transmitter to the receiver; there's no radiation. The same principle applies to power delivery. If my source, my VRM, can be matched with the load, and my decoupling capacitors are all matched and not resonating across frequencies from DC to tens of megahertz, the power gets to the load correctly. There's no radiation. That's really the goal of a power integrity engineer: to minimize the resonances, the sources of EMI/EMC, and to provide flat versus frequency power delivery. When voltage and current are in phase, you actually solve a lot of problems all at once.

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